Hi there! My name is Mark. I’m a PhD candidate in High-Performance Computing at EPCC, the UK national supercomputing centre, and the University of Edinburgh, supervised by Nick Brown and Oliver Brown. I’m exploring the acceleration of quantitative finance workloads on Field-programmable Gate Arrays (FPGAs), and for this, I investigate approaches for recasting Von-Neumann-based algorithms into a dataflow style suitable for FPGAs. During my PhD project, I have been developing and optimizing financial workloads on recent generations of Intel and Xilinx FPGAs via High-Level Synthesis (HLS) in C/C++, comparing these against traditional x86 and GPU architectures.

In mid-2021, I started collaborating with STAC, who provide industry-standard financial benchmarks, to explore the acceleration of their benchmark suite on reconfigurable architectures. I am interested in heterogeneous computing, novel architectures, and all things HPC.

Before starting my PhD, I worked as an IT analyst in the financial services sector and studied at Mannheim University in Germany. I have a background in economics and finance, and I graduated with a master’s in High-Performance Computing from EPCC in 2019 with a project on scaling GPU inference for a segmentation task in weather forecasting.

You can find my publication record on Google Scholar. If you would like to reach out to me, then please send an email or contact me on Linkedin.